Protocol Leak and Fingerprinting Protection
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Protocol Leak and Fingerprinting Protection
Protection from IP Leaks, DNS Leaks, Protocol Leaks and Fingerprinting. Analysis of host hardware identifiers visible or hidden inside virtual machines.
Introduction
[edit]Whonix cannot do the impossible and magically prevent every kind of protocol leak
and identifier disclosure:
Tor provides only anonymity for DNS and the transmission of the TCP stream. Everything inside the stream, the application protocol, needs to be scrubbed. For example, if the application uses advanced techniques to determine your real external IP and sends it over the anonymized TCP stream, then what you wanted to hide, your real external IP, isn't hidden.
...
Many applications can also leak other problematic and/or sensitive data, such as:
- Your real external non-Tor IP address, as described above
- Your time zone (for example: IRC clients through CTCP)
- Your user name (for example: ssh through login)
- The name and version of the client or server you are using (for example: Apache web server leaks software name and version number; IRC clients leak client name and client version number through CTCP)
- Metadata can be a risk. Click MAT and read 'What is a metadata?' and 'Why metadata can be a risk for your privacy?'
- Depending on your Mode Of Anonymity you obviously shouldn't mix your use of protected (anonymous) applications with applications not passing through the Tor network or some other form of anonymity. For example, if a login name or password of yours can be traced back to your personal identity, then you are defeating the purpose entirely. Tor can not protect you from this kind of activity
- Even sending the contents of your RAM can be dangerous. (For example: error reporting, leading to Transparent Proxy Leaks)
- A lot of information which the application sends on request from a server (for example: most web browsers beside the Tor Browser)
- Hardware serial numbers might be used for fingerprinting and in the worst case scenario, lead back to you.
- License keys of non-freedom software is often transmitted and might lead back to you.
Despite the many risks, Whonix is designed to offer multiple layers of defense for the best possible protection against inadvertent deanonymization.
Whonix Advantages
[edit]Protection Against Serious Leaks
[edit]Whonix protects against the most dangerous leak categories outlined below, which would otherwise divulge the user's real identity (remotely or directly):
- The real, external, non-Tor IP address is hidden due to the fundamental Whonix design, use of an isolated proxy, and the Whonix-Gateway Firewall. [1]
- The same applies for DNS[1] requests; they are safe. [2]
Numerous Default Applications are Pre-configured Against Leaks
[edit]Developers have taken care to prevent common applications from leaking information that could identify users, including:
- Stream Isolation: Configuring applications to use their own SocksPort, thus preventing Identity correlation through circuit sharing.
- Browser fingerprinting: Whonix includes Tor Browser by default. The browser fingerprint is as good (or bad) as using the normal Tor Browser bundle from torproject.org
- GPG:
/home/user/gpg.confis optimized for privacy; see footnote. [3] - ssh: Without Whonix, the syntax for ssh is user@hostname [...]. However, if a specific user is not nominated before @hostname, the operating system user name will be utilized instead. If that value is something identifiable, then anonymity is broken. Since Whonix defaults the user name to
user, in the worst case only the usernameusercan be leaked, which is harmless. [4] [5] - Default Application Policy
Many protocol leaks are already documented, see: Documentation and TorifyHOWTO for further information.
Identifiers
[edit]In addition to protocol leaks, there are also a range of identifiers that can be used for fingerprinting by adversaries for anonymity set reduction (for example, the time zone), or even for complete deanonymization (for example, if the user name was set to John Doe). Such identifiers are described below.
Software Identifiers
[edit]| Category | Description |
|---|---|
| Color depth | The default color depth is 24-bit for all Whonix users. [6] [7] |
| Desktop Resolution | |
| Fonts | All Whonix users have the same list of fonts installed. [10] [11] [12] |
| Hostname | The hostname is set to host. [13]
|
| Internal (virtual LAN) IP address |
|
| Long host name (FQDN) | The long host name (FQDN) is set to host.localdomain [15] |
| Operating system updates | Operating system (apt) updates are routed through their own circuit (Stream Isolation) to prevent accidental leakage of software packages and versions (if any custom software is installed) which could then be correlated with other anonymous activity. Also see: Software updaters and Software installation Whonix-Workstation.
|
| Time |
|
| User name | The user name is set to user.
|
| RAM | In the worst case scenario, if RAM contents are leaked -- such as error reporting software phoning home, RAM dump if infected with malware, or Transparent Proxy Leaks) -- this would "only" contain the RAM of the Whonix-Workstation. All non-anonymous material on the host remains safe.
|
| Qubes | Virtualbox | KVM | |
| Identical software packages [17] | Differs from Non-Qubes-Whonix | Differs from Qubes-Whonix | Differs from Qubes-Whonix |
Hardware Identifiers
[edit]These identifiers are less important because an adversary can only collect them if the user installed malicious software (for example, some copyright enforcement and anti-cheat tools collect them), or if the adversary achieves remote access by compromising a user or in some cases the root account.
Hardware identifiers are virtualizer specific issues were all virtualizers are affected and therefore unspecific to Whonix.
| Qubes | VirtualBox | KVM | |
| Hidden CPU model and capabilities | No | No [18] | No [19] [20] [21] |
| Hidden hardware serial numbers [22] [23] | Yes | Yes | Yes |
Hidden  CPUID (CPU model and capabilities) processor instruction
|
No | No | No |
| Hidden graphic card information | Yes [24] | Yes [25] | ? |
| Same amount of RAM assignment | Dynamically assigned | Yes, fixed | Yes, fixed |
| Hidden sensor information [26] [27] [28] | Yes | Yes | Yes |
| Hidden battery information [29] | Yes | No | Yes |
| Hidden BIOS DMI information [30] | Yes | Yes | Yes |
| Hidden virtual BIOS DMI information and Virtual HDD and CD serial numbers [30] [31] | Yes, only virtual ones | Yes, only virtual ones | Yes, only virtual ones |
| Hidden VM UUID [32] [33] | Yes | Yes | Yes |
| Hidden SLIC table [34]
|
Yes, not implemented | Yes, empty by default | Yes, not present |
| HDD UUIDs are different from the host [35] | Yes | Yes | Yes |
| CD-ROM UUID is identical for all Whonix users [36] | Yes | Yes | Yes |
| Hidden disk UUIDs [37] | Yes | Yes | Yes |
| Hidden EDID [38]
|
Yes [39] | Yes [40] [41] | Yes [42] |
| See Also | VM Fingerprinting | ||
|---|---|---|---|
| Category | Description |
|---|---|
| MAC address | The MAC address is different from the host. See also MAC Address. [43] [44]
|
Metadata
[edit]See Metadata.
Identifiers Design Goals
[edit]Should the goal be,
- A) a shared personality: to have all Whonix appear with the same uniform fingerprint at all times, OR
- B) a virtual personality: to invent and emulate a different unique fingerprint for each user?
In other words, should each Whonix system look exactly the same to observers, or should it try to look different for every user?
The same question rephrased in more technical terms: should identifiers such as /etc/machine-id:
- A) shared: be the same across all Whonix systems, OR
- B) unique: be regenerated for each user at every system boot?
Whonix design, at the time of writing, is A). [45] It may be possible to argue for either option. However, upon consideration, it seems clear that A) offers greater privacy in the context of how Whonix is used.
The threat model being considered here is that some software inside Whonix-Workstation might read system identifiers — such as the machine ID — and send them to a remote server. That remote server could then use this identifier to recognize or track users. This type of software can be described as privacy-invasive or, in more severe cases, malicious.
Choosing option A) does mean that the machine ID reveals, "this is a Whonix system." However, avoiding this kind of leakage is realistically not possible. For a deeper explanation, refer to the VM Fingerprinting page and the System Identity Camouflage wiki pages. This is a general problem and is unspecific to Whonix. In fact, if an application or malware wants to track users, it can simply generate its own identifier and use that. Therefore, trying to hide system-level identifiers like /etc/machine-id does not meaningfully increase privacy in most cases.
Tor and the Tor Browser take a similar approach to this issue. They do not try to generate a new random identity (pseudonym) each time they are used. Instead, their strategy is to make all users appear the same to outside observers. The Tor Project refers to this concept as Anonymity Loves Company (you can search the web for this term for more background). Since Whonix is designed as an extension of Tor, it follows the same principle.
Option B) would avoid revealing that a system is running Whonix, but actually hiding this fact is not practically achievable, as explained in VM Fingerprinting.
There is also a trade-off between two goals: complete resistance to fingerprinting by local software, and applying strong system hardening for better security. Unfortunately, when the system is hardened for security, this itself becomes a fingerprint: it reveals that the system has been customized or secured, which may make it more identifiable. Since it is impossible to achieve both goals perfectly, Whonix prioritizes security hardening whenever these goals conflict.
When not using virtual machines (VMs), privacy-invasive software running on the host system has even greater ability to fingerprint users, because it can directly access hardware identifiers such as serial numbers, MAC addresses, or CPU features.
For a related wiki page on identifiers, see: Protocol Leak Protection and Fingerprinting Protection.
Discussions:
- This wiki chapter has been written in response to Some Linux systems (including Whonix) have a unique identifier called machine-id that doesn't change. Here is how to change it.
- Forum discussion: Anonymize
/etc/machine-id
CPU Output Tests
[edit]TNT_BOM_BOM generated /proc/cpuinfo output which was posted to the Whonix forums and copied here.
CPU Test One
[edit]These are the results before running VBoxManage modifyvm Whonix-Workstation --cpuidremoveall.
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 37 model name : Intel(R) Core(TM) i5 CPU M 580 @ 2.67GHz stepping : 5 microcode : 0x616 cpu MHz : 2659.899 cache size : 3072 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 11 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx lm constant_tsc xtopology nonstop_tsc pni monitor lahf_lm bogomips : 5319.79 clflush size : 64 cache_alignment : 64 address sizes : 36 bits physical, 48 bits virtual power management:
CPU Test Two
[edit]These are the results after running VBoxManage modifyvm Whonix-Workstation --cpuidremoveall and shutting down the workstation.
processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 37 model name : Intel(R) Core(TM) i5 CPU M 580 @ 2.67GHz stepping : 5 microcode : 0x616 cpu MHz : 2660.690 cache size : 3072 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 11 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx lm constant_tsc xtopology nonstop_tsc pni monitor lahf_lm bogomips : 5321.38 clflush size : 64 cache_alignment : 64 address sizes : 36 bits physical, 48 bits virtual power management:
KVM Whonix-Workstation 12 /proc/cpuinfo
[edit]processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : QEMU Virtual CPU version 2.1.2 stepping : 3 microcode : 0x1 cpu MHz : 2659.914 cache size : 4096 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 4 wp : yes flags : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pse36 clflush mmx fxsr sse sse2 syscall nx lm pni cx16 x2apic popcnt hypervisor lahf_lm bogomips : 5319.82 clflush size : 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management: processor : 1 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : QEMU Virtual CPU version 2.1.2 stepping : 3 microcode : 0x1 cpu MHz : 2659.914 cache size : 4096 KB physical id : 1 siblings : 1 core id : 0 cpu cores : 1 apicid : 1 initial apicid : 1 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 4 wp : yes flags : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pse36 clflush mmx fxsr sse sse2 syscall nx lm pni cx16 x2apic popcnt hypervisor lahf_lm bogomips : 1945.60 clflush size : 64 cache_alignment : 64 address sizes : 40 bits physical, 48 bits virtual power management:
KVM Whonix-Workstation 13 /proc/cpuinfo
[edit]> processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : QEMU Virtual CPU version 2.1.2 stepping : 3 microcode : 0x1 cache size : 4096 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 4 wp : yes flags : fpu de pse msr pae mce cx8 apic sep mtrr pge mca cmov pse36 mmx fxsr sse sse2 syscall nx lm pni cx16 x2apic popcnt aes hypervisor lahf_lm bogomips : 1185.79 clflush size : 32 cache_alignment : 32 address sizes : 40 bits physical, 48 bits virtual power management: > processor : 1 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : QEMU Virtual CPU version 2.1.2 stepping : 3 microcode : 0x1 cache size : 4096 KB physical id : 1 siblings : 1 core id : 0 cpu cores : 1 apicid : 1 initial apicid : 1 fdiv_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 4 wp : yes flags : fpu de pse msr pae mce cx8 apic sep mtrr pge mca cmov pse36 mmx fxsr sse sse2 syscall nx lm pni cx16 x2apic popcnt aes hypervisor lahf_lm bogomips : 1173.50 clflush size : 32 cache_alignment : 32 address sizes : 40 bits physical, 48 bits virtual power management:
KVM Whonix-Workstation 17 /proc/cpuinfo
[edit][workstation user ~]% cat /proc/cpuinfo processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 37 model name : Intel(R) Core(TM) i5 CPU M 580 @ 2.67GHz stepping : 5 microcode : 0x7 cpu MHz : 2659.828 cache size : 16384 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fpu : yes fpu_exception : yes cpuid level : 11 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx rdtscp lm constant_tsc rep_good nopl xtopology cpuid pni pclmulqdq vmx ssse3 cx16 pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes hypervisor lahf_lm cpuid_fault pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid tsc_adjust arat umip flush_l1d arch_capabilities vmx flags : vnmi preemption_timer invvpid ept_x_only ept_1gb flexpriority tsc_offset vtpr mtf vapic ept vpid unrestricted_guest shadow_vmcs bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds swapgs mmio_unknown bogomips : 5319.65 clflush size : 64 cache_alignment : 64 address sizes : 36 bits physical, 48 bits virtual power management:
KVM Whonix-Workstation 17 cpuid with cpu model qemu64
[edit]https://forums.whonix.org/t/potential-improvements-for-virtual-machine-cloaking/21915/7
cpuid
CPU 0:
vendor_id = "GenuineIntel"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0xb (11)
stepping id = 0x1 (1)
extended family = 0x0 (0)
extended model = 0x6 (6)
(family synth) = 0xf (15)
(model synth) = 0x6b (107)
(simple synth) = Intel Pentium 4 / Pentium D / Xeon / Xeon MP / Celeron / Celeron D (unknown model) {Netburst}
miscellaneous (1/ebx):
process local APIC physical ID = 0x0 (0)
maximum IDs for CPUs in pkg = 0x0 (0)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = false
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = false
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = false
DTES64: 64-bit debug store = false
MONITOR/MWAIT = false
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = false
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = false
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = false
SSE4.2 extensions = false
x2APIC: extended xAPIC support = true
MOVBE instruction = false
POPCNT instruction = false
time stamp counter deadline = false
AES instruction = false
XSAVE/XSTOR states = false
OS-enabled XSAVE/XSTOR = false
AVX: advanced vector extensions = false
F16C half-precision convert instruction = false
RDRAND instruction = false
hypervisor guest status = true
cache and TLB information (2):
0x4d: L3 cache: 16M, 16-way, 64 byte lines
0x7d: L2 cache: 2M, 8-way, 64 byte lines
0x30: L1 cache: 32K, 8-way, 64 byte lines
0x2c: L1 data cache: 32K, 8-way, 64 byte lines
processor serial number = 0006-0FB1-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = data cache (1)
cache level = 0x1 (1)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x8 (8)
number of sets = 0x40 (64)
WBINVD/INVD acts on lower caches = true
inclusive to lower caches = false
complex cache indexing = false
number of sets (s) = 64
(size synth) = 32768 (32 KB)
--- cache 1 ---
cache type = instruction cache (2)
cache level = 0x1 (1)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x8 (8)
number of sets = 0x40 (64)
WBINVD/INVD acts on lower caches = true
inclusive to lower caches = false
complex cache indexing = false
number of sets (s) = 64
(size synth) = 32768 (32 KB)
--- cache 2 ---
cache type = unified cache (3)
cache level = 0x2 (2)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x10 (16)
number of sets = 0x1000 (4096)
WBINVD/INVD acts on lower caches = true
inclusive to lower caches = false
complex cache indexing = false
number of sets (s) = 4096
(size synth) = 4194304 (4 MB)
--- cache 3 ---
cache type = unified cache (3)
cache level = 0x3 (3)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x10 (16)
number of sets = 0x4000 (16384)
WBINVD/INVD acts on lower caches = false
inclusive to lower caches = true
complex cache indexing = true
number of sets (s) = 16384
(size synth) = 16777216 (16 MB)
--- cache 4 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x0 (0)
largest monitor-line size (bytes) = 0x0 (0)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
number of C0 sub C-states using MWAIT = 0x0 (0)
number of C1 sub C-states using MWAIT = 0x0 (0)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = false
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = false
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = false
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = false
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = false
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = false
BMI2 instructions = false
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = false
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = false
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = false
ADX instructions = false
SMAP: supervisor mode access prevention = false
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = false
CLWB instruction = false
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = false
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = false
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = false
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOV = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = true
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = true
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = true
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
top-down slots event = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
x2APIC features / processor topology (0xb):
extended APIC ID = 0
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level = 0x0 (0)
number of logical processors at level = 0x1 (1)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level = 0x0 (0)
number of logical processors at level = 0x1 (1)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000000
x87 state = false
SSE state = false
AVX state = false
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = false
XTILECFG state = false
XTILEDATA state = false
bytes required by fields in XCR0 = 0x00000000 (0)
bytes required by XSAVE/XRSTOR area = 0x00000000 (0)
XSAVEOPT instruction = false
XSAVEC instruction = false
XGETBV instruction = false
XSAVES/XRSTORS instructions = false
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000000 (0)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
hypervisor_id (0x40000000) = "KVMKVMKVM\0\0\0"
hypervisor features (0x40000001/eax):
kvmclock available at MSR 0x11 = false
delays unnecessary for PIO ops = true
mmu_op = false
kvmclock available at MSR 0x4b564d00 = false
async pf enable available by MSR = true
steal clock supported = true
guest EOI optimization enabled = true
guest spinlock optimization enabled = true
guest TLB flush optimization enabled = false
async PF VM exit enable available by MSR = false
guest send IPI optimization enabled = false
host HLT poll disable at MSR 0x4b564d05 = false
guest sched yield optimization enabled = false
guest uses intrs for page ready APF evs = false
extended destination ID = false
map gpa range hypercall supported = false
MSR_KVM_MIGRATION_CONTROL supported = false
stable: no guest per-cpu warps expected = true
hypervisor features (0x40000001/edx):
realtime hint: no unbound preemption = false
hypervisor_id (0x40000100) = "\0\0\0\0\0\0\0\0\0\0\0\0"
extended feature flags (0x80000001/edx):
SYSCALL and SYSRET instructions = true
execution disable = true
1-GB large page support = false
RDTSCP = false
64-bit extensions technology available = true
Intel feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
LZCNT advanced bit manipulation = false
3DNow! PREFETCH/PREFETCHW instructions = false
brand = "QEMU Virtual CPU version 2.5+"
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0xff (255)
instruction associativity = 0x1 (1)
data # entries = 0xff (255)
data associativity = 0x1 (1)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0xff (255)
instruction associativity = 0x1 (1)
data # entries = 0xff (255)
data associativity = 0x1 (1)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x2 (2)
size (KB) = 0x40 (64)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x2 (2)
size (KB) = 0x40 (64)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x200 (512)
instruction associativity = 4 to 5-way (4)
data # entries = 0x200 (512)
data associativity = 4 to 5-way (4)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 16 to 31-way (8)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 16 to 31-way (8)
size (in 512KB units) = 0x20 (32)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = false
SUCCOR support = false
HWA: hardware assert support = false
scalable MCA support = false
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = false
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = false
TM: thermal monitor = false
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = false
TscInvariant = false
CPB: core performance boost = false
read-only effective frequency interface = false
processor feedback interface = false
APM power reporting = false
connected standby = false
RAPL: running average power limit = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x28 (40)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = false
instructions retired count support = false
always save/restore error pointers = false
INVLPGB instruction = false
RDPRU instruction = false
memory bandwidth enforcement = false
MCOMMIT instruction = false
WBNOINVD instruction = false
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = false
IBRS: indirect branch restr speculation = false
STIBP: 1 thr indirect branch predictor = false
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = false
IBRS provides same mode protection = false
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = false
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of CPU cores = 0x1 (1)
ApicIdCoreIdSize = 0x0 (0)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x0 (0)
SVM Secure Virtual Machine (0x8000000a/eax):
SvmRev: SVM revision = 0x0 (0)
SVM Secure Virtual Machine (0x8000000a/edx):
nested paging = false
LBR virtualization = false
SVM lock = false
NRIP save = false
MSR based TSC rate control = false
VMCB clean bits support = false
flush by ASID = false
decode assists = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = false
pause filter threshold = false
AVIC: AMD virtual interrupt controller = false
virtualized VMLOAD/VMSAVE = false
virtualized global interrupt flag (GIF) = false
GMET: guest mode execute trap = false
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = false
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
guest SVME addr check = false
NASID: number of address space identifiers = 0x0 (0):
(multi-processing synth) = none
(multi-processing method) = Intel leaf 0xb
(APIC widths synth): CORE_width=0 SMT_width=0
(APIC synth): PKG_ID=0 CORE_ID=0 SMT_ID=0
(uarch synth) = Intel {Netburst}
(synth) = Intel Pentium 4 / Pentium D / Xeon / Xeon MP / Celeron / Celeron D (unknown model) {Netburst}
CPU 1:
vendor_id = "GenuineIntel"
version information (1/eax):
processor type = primary processor (0)
family = 0xf (15)
model = 0xb (11)
stepping id = 0x1 (1)
extended family = 0x0 (0)
extended model = 0x6 (6)
(family synth) = 0xf (15)
(model synth) = 0x6b (107)
(simple synth) = Intel Pentium 4 / Pentium D / Xeon / Xeon MP / Celeron / Celeron D (unknown model) {Netburst}
miscellaneous (1/ebx):
process local APIC physical ID = 0x1 (1)
maximum IDs for CPUs in pkg = 0x0 (0)
CLFLUSH line size = 0x8 (8)
brand index = 0x0 (0)
brand id = 0x00 (0): unknown
feature information (1/edx):
x87 FPU on chip = true
VME: virtual-8086 mode enhancement = false
DE: debugging extensions = true
PSE: page size extensions = true
TSC: time stamp counter = true
RDMSR and WRMSR support = true
PAE: physical address extensions = true
MCE: machine check exception = true
CMPXCHG8B inst. = true
APIC on chip = true
SYSENTER and SYSEXIT = true
MTRR: memory type range registers = true
PTE global bit = true
MCA: machine check architecture = true
CMOV: conditional move/compare instr = true
PAT: page attribute table = true
PSE-36: page size extension = true
PSN: processor serial number = false
CLFLUSH instruction = true
DS: debug store = false
ACPI: thermal monitor and clock ctrl = false
MMX Technology = true
FXSAVE/FXRSTOR = true
SSE extensions = true
SSE2 extensions = true
SS: self snoop = false
hyper-threading / multi-core supported = false
TM: therm. monitor = false
IA64 = false
PBE: pending break event = false
feature information (1/ecx):
PNI/SSE3: Prescott New Instructions = true
PCLMULDQ instruction = false
DTES64: 64-bit debug store = false
MONITOR/MWAIT = false
CPL-qualified debug store = false
VMX: virtual machine extensions = false
SMX: safer mode extensions = false
Enhanced Intel SpeedStep Technology = false
TM2: thermal monitor 2 = false
SSSE3 extensions = false
context ID: adaptive or shared L1 data = false
SDBG: IA32_DEBUG_INTERFACE = false
FMA instruction = false
CMPXCHG16B instruction = true
xTPR disable = false
PDCM: perfmon and debug = false
PCID: process context identifiers = false
DCA: direct cache access = false
SSE4.1 extensions = false
SSE4.2 extensions = false
x2APIC: extended xAPIC support = true
MOVBE instruction = false
POPCNT instruction = false
time stamp counter deadline = false
AES instruction = false
XSAVE/XSTOR states = false
OS-enabled XSAVE/XSTOR = false
AVX: advanced vector extensions = false
F16C half-precision convert instruction = false
RDRAND instruction = false
hypervisor guest status = true
cache and TLB information (2):
0x4d: L3 cache: 16M, 16-way, 64 byte lines
0x7d: L2 cache: 2M, 8-way, 64 byte lines
0x30: L1 cache: 32K, 8-way, 64 byte lines
0x2c: L1 data cache: 32K, 8-way, 64 byte lines
processor serial number = 0006-0FB1-0000-0000-0000-0000
deterministic cache parameters (4):
--- cache 0 ---
cache type = data cache (1)
cache level = 0x1 (1)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x8 (8)
number of sets = 0x40 (64)
WBINVD/INVD acts on lower caches = true
inclusive to lower caches = false
complex cache indexing = false
number of sets (s) = 64
(size synth) = 32768 (32 KB)
--- cache 1 ---
cache type = instruction cache (2)
cache level = 0x1 (1)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x8 (8)
number of sets = 0x40 (64)
WBINVD/INVD acts on lower caches = true
inclusive to lower caches = false
complex cache indexing = false
number of sets (s) = 64
(size synth) = 32768 (32 KB)
--- cache 2 ---
cache type = unified cache (3)
cache level = 0x2 (2)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x10 (16)
number of sets = 0x1000 (4096)
WBINVD/INVD acts on lower caches = true
inclusive to lower caches = false
complex cache indexing = false
number of sets (s) = 4096
(size synth) = 4194304 (4 MB)
--- cache 3 ---
cache type = unified cache (3)
cache level = 0x3 (3)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x0 (0)
maximum IDs for cores in pkg = 0x0 (0)
system coherency line size = 0x40 (64)
physical line partitions = 0x1 (1)
ways of associativity = 0x10 (16)
number of sets = 0x4000 (16384)
WBINVD/INVD acts on lower caches = false
inclusive to lower caches = true
complex cache indexing = true
number of sets (s) = 16384
(size synth) = 16777216 (16 MB)
--- cache 4 ---
cache type = no more caches (0)
MONITOR/MWAIT (5):
smallest monitor-line size (bytes) = 0x0 (0)
largest monitor-line size (bytes) = 0x0 (0)
enum of Monitor-MWAIT exts supported = true
supports intrs as break-event for MWAIT = true
number of C0 sub C-states using MWAIT = 0x0 (0)
number of C1 sub C-states using MWAIT = 0x0 (0)
number of C2 sub C-states using MWAIT = 0x0 (0)
number of C3 sub C-states using MWAIT = 0x0 (0)
number of C4 sub C-states using MWAIT = 0x0 (0)
number of C5 sub C-states using MWAIT = 0x0 (0)
number of C6 sub C-states using MWAIT = 0x0 (0)
number of C7 sub C-states using MWAIT = 0x0 (0)
Thermal and Power Management Features (6):
digital thermometer = false
Intel Turbo Boost Technology = false
ARAT always running APIC timer = false
PLN power limit notification = false
ECMD extended clock modulation duty = false
PTM package thermal management = false
HWP base registers = false
HWP notification = false
HWP activity window = false
HWP energy performance preference = false
HWP package level request = false
HDC base registers = false
Intel Turbo Boost Max Technology 3.0 = false
HWP capabilities = false
HWP PECI override = false
flexible HWP = false
IA32_HWP_REQUEST MSR fast access mode = false
HW_FEEDBACK MSRs supported = false
ignoring idle logical processor HWP req = false
Thread Director = false
IA32_HW_FEEDBACK_THREAD_CONFIG bit 25 = false
digital thermometer thresholds = 0x0 (0)
hardware coordination feedback = false
ACNT2 available = false
performance-energy bias capability = false
number of enh hardware feedback classes = 0x0 (0)
performance capability reporting = false
energy efficiency capability reporting = false
size of feedback struct (4KB pages) = 0x1 (1)
index of CPU's row in feedback struct = 0x0 (0)
extended feature flags (7):
FSGSBASE instructions = false
IA32_TSC_ADJUST MSR supported = false
SGX: Software Guard Extensions supported = false
BMI1 instructions = false
HLE hardware lock elision = false
AVX2: advanced vector extensions 2 = false
FDP_EXCPTN_ONLY = false
SMEP supervisor mode exec protection = false
BMI2 instructions = false
enhanced REP MOVSB/STOSB = false
INVPCID instruction = false
RTM: restricted transactional memory = false
RDT-CMT/PQoS cache monitoring = false
deprecated FPU CS/DS = false
MPX: intel memory protection extensions = false
RDT-CAT/PQE cache allocation = false
AVX512F: AVX-512 foundation instructions = false
AVX512DQ: double & quadword instructions = false
RDSEED instruction = false
ADX instructions = false
SMAP: supervisor mode access prevention = false
AVX512IFMA: integer fused multiply add = false
PCOMMIT instruction = false
CLFLUSHOPT instruction = false
CLWB instruction = false
Intel processor trace = false
AVX512PF: prefetch instructions = false
AVX512ER: exponent & reciprocal instrs = false
AVX512CD: conflict detection instrs = false
SHA instructions = false
AVX512BW: byte & word instructions = false
AVX512VL: vector length = false
PREFETCHWT1 = false
AVX512VBMI: vector byte manipulation = false
UMIP: user-mode instruction prevention = false
PKU protection keys for user-mode = false
OSPKE CR4.PKE and RDPKRU/WRPKRU = false
WAITPKG instructions = false
AVX512_VBMI2: byte VPCOMPRESS, VPEXPAND = false
CET_SS: CET shadow stack = false
GFNI: Galois Field New Instructions = false
VAES instructions = false
VPCLMULQDQ instruction = false
AVX512_VNNI: neural network instructions = false
AVX512_BITALG: bit count/shiffle = false
TME: Total Memory Encryption = false
AVX512: VPOPCNTDQ instruction = false
LA57: 57-bit addrs & 5-level paging = false
BNDLDX/BNDSTX MAWAU value in 64-bit mode = 0x0 (0)
RDPID: read processor ID supported = false
KL: key locker = false
bus lock detection = false
CLDEMOTE supports cache line demote = false
MOVDIRI instruction = false
MOVDIR64B instruction = false
ENQCMD instruction = false
SGX_LC: SGX launch config supported = false
PKS: supervisor protection keys = false
SGX-KEYS: SGX attestation services = false
AVX512_4VNNIW: neural network instrs = false
AVX512_4FMAPS: multiply acc single prec = false
fast short REP MOV = false
UINTR: user interrupts = false
AVX512_VP2INTERSECT: intersect mask regs = false
IA32_MCU_OPT_CTRL SRBDS mitigation MSR = false
VERW MD_CLEAR microcode support = true
RTM transaction always aborts = false
IA32_TSX_FORCE_ABORT MSR = false
SERIALIZE instruction = false
hybrid part = false
TSXLDTRK: TSX suspend load addr tracking = false
PCONFIG instruction = false
LBR: architectural last branch records = false
CET_IBT: CET indirect branch tracking = false
AMX-BF16: tile bfloat16 support = false
AVX512_FP16: fp16 support = false
AMX-TILE: tile architecture support = false
AMX-INT8: tile 8-bit integer support = false
IBRS/IBPB: indirect branch restrictions = true
STIBP: 1 thr indirect branch predictor = false
L1D_FLUSH: IA32_FLUSH_CMD MSR = false
IA32_ARCH_CAPABILITIES MSR = false
IA32_CORE_CAPABILITIES MSR = false
SSBD: speculative store bypass disable = true
Direct Cache Access Parameters (9):
PLATFORM_DCA_CAP MSR bits = 0
Architecture Performance Monitoring Features (0xa):
version ID = 0x0 (0)
number of counters per logical processor = 0x0 (0)
bit width of counter = 0x0 (0)
length of EBX bit vector = 0x0 (0)
core cycle event = not available
instruction retired event = not available
reference cycles event = not available
last-level cache ref event = not available
last-level cache miss event = not available
branch inst retired event = not available
branch mispred retired event = not available
top-down slots event = not available
fixed counter 0 supported = false
fixed counter 1 supported = false
fixed counter 2 supported = false
fixed counter 3 supported = false
fixed counter 4 supported = false
fixed counter 5 supported = false
fixed counter 6 supported = false
fixed counter 7 supported = false
fixed counter 8 supported = false
fixed counter 9 supported = false
fixed counter 10 supported = false
fixed counter 11 supported = false
fixed counter 12 supported = false
fixed counter 13 supported = false
fixed counter 14 supported = false
fixed counter 15 supported = false
fixed counter 16 supported = false
fixed counter 17 supported = false
fixed counter 18 supported = false
fixed counter 19 supported = false
fixed counter 20 supported = false
fixed counter 21 supported = false
fixed counter 22 supported = false
fixed counter 23 supported = false
fixed counter 24 supported = false
fixed counter 25 supported = false
fixed counter 26 supported = false
fixed counter 27 supported = false
fixed counter 28 supported = false
fixed counter 29 supported = false
fixed counter 30 supported = false
fixed counter 31 supported = false
number of contiguous fixed counters = 0x0 (0)
bit width of fixed counters = 0x0 (0)
anythread deprecation = false
x2APIC features / processor topology (0xb):
extended APIC ID = 1
--- level 0 ---
level number = 0x0 (0)
level type = thread (1)
bit width of level = 0x0 (0)
number of logical processors at level = 0x1 (1)
--- level 1 ---
level number = 0x1 (1)
level type = core (2)
bit width of level = 0x0 (0)
number of logical processors at level = 0x1 (1)
--- level 2 ---
level number = 0x2 (2)
level type = invalid (0)
bit width of level = 0x0 (0)
number of logical processors at level = 0x0 (0)
XSAVE features (0xd/0):
XCR0 valid bit field mask = 0x0000000000000000
x87 state = false
SSE state = false
AVX state = false
MPX BNDREGS = false
MPX BNDCSR = false
AVX-512 opmask = false
AVX-512 ZMM_Hi256 = false
AVX-512 Hi16_ZMM = false
PKRU state = false
XTILECFG state = false
XTILEDATA state = false
bytes required by fields in XCR0 = 0x00000000 (0)
bytes required by XSAVE/XRSTOR area = 0x00000000 (0)
XSAVEOPT instruction = false
XSAVEC instruction = false
XGETBV instruction = false
XSAVES/XRSTORS instructions = false
XFD: extended feature disable supported = false
SAVE area size in bytes = 0x00000000 (0)
IA32_XSS valid bit field mask = 0x0000000000000000
PT state = false
PASID state = false
CET_U user state = false
CET_S supervisor state = false
HDC state = false
UINTR state = false
LBR state = false
HWP state = false
hypervisor_id (0x40000000) = "KVMKVMKVM\0\0\0"
hypervisor features (0x40000001/eax):
kvmclock available at MSR 0x11 = false
delays unnecessary for PIO ops = true
mmu_op = false
kvmclock available at MSR 0x4b564d00 = false
async pf enable available by MSR = true
steal clock supported = true
guest EOI optimization enabled = true
guest spinlock optimization enabled = true
guest TLB flush optimization enabled = false
async PF VM exit enable available by MSR = false
guest send IPI optimization enabled = false
host HLT poll disable at MSR 0x4b564d05 = false
guest sched yield optimization enabled = false
guest uses intrs for page ready APF evs = false
extended destination ID = false
map gpa range hypercall supported = false
MSR_KVM_MIGRATION_CONTROL supported = false
stable: no guest per-cpu warps expected = true
hypervisor features (0x40000001/edx):
realtime hint: no unbound preemption = false
hypervisor_id (0x40000100) = "\0\0\0\0\0\0\0\0\0\0\0\0"
extended feature flags (0x80000001/edx):
SYSCALL and SYSRET instructions = true
execution disable = true
1-GB large page support = false
RDTSCP = false
64-bit extensions technology available = true
Intel feature flags (0x80000001/ecx):
LAHF/SAHF supported in 64-bit mode = true
LZCNT advanced bit manipulation = false
3DNow! PREFETCH/PREFETCHW instructions = false
brand = "QEMU Virtual CPU version 2.5+"
L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
instruction # entries = 0xff (255)
instruction associativity = 0x1 (1)
data # entries = 0xff (255)
data associativity = 0x1 (1)
L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
instruction # entries = 0xff (255)
instruction associativity = 0x1 (1)
data # entries = 0xff (255)
data associativity = 0x1 (1)
L1 data cache information (0x80000005/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x2 (2)
size (KB) = 0x40 (64)
L1 instruction cache information (0x80000005/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 0x2 (2)
size (KB) = 0x40 (64)
L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
instruction # entries = 0x0 (0)
instruction associativity = L2 off (0)
data # entries = 0x0 (0)
data associativity = L2 off (0)
L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
instruction # entries = 0x200 (512)
instruction associativity = 4 to 5-way (4)
data # entries = 0x200 (512)
data associativity = 4 to 5-way (4)
L2 unified cache information (0x80000006/ecx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 16 to 31-way (8)
size (KB) = 0x200 (512)
L3 cache information (0x80000006/edx):
line size (bytes) = 0x40 (64)
lines per tag = 0x1 (1)
associativity = 16 to 31-way (8)
size (in 512KB units) = 0x20 (32)
RAS Capability (0x80000007/ebx):
MCA overflow recovery support = false
SUCCOR support = false
HWA: hardware assert support = false
scalable MCA support = false
Advanced Power Management Features (0x80000007/ecx):
CmpUnitPwrSampleTimeRatio = 0x0 (0)
Advanced Power Management Features (0x80000007/edx):
TS: temperature sensing diode = false
FID: frequency ID control = false
VID: voltage ID control = false
TTP: thermal trip = false
TM: thermal monitor = false
STC: software thermal control = false
100 MHz multiplier control = false
hardware P-State control = false
TscInvariant = false
CPB: core performance boost = false
read-only effective frequency interface = false
processor feedback interface = false
APM power reporting = false
connected standby = false
RAPL: running average power limit = false
Physical Address and Linear Address Size (0x80000008/eax):
maximum physical address bits = 0x28 (40)
maximum linear (virtual) address bits = 0x30 (48)
maximum guest physical address bits = 0x0 (0)
Extended Feature Extensions ID (0x80000008/ebx):
CLZERO instruction = false
instructions retired count support = false
always save/restore error pointers = false
INVLPGB instruction = false
RDPRU instruction = false
memory bandwidth enforcement = false
MCOMMIT instruction = false
WBNOINVD instruction = false
IBPB: indirect branch prediction barrier = true
interruptible WBINVD, WBNOINVD = false
IBRS: indirect branch restr speculation = false
STIBP: 1 thr indirect branch predictor = false
CPU prefers: IBRS always on = false
CPU prefers: STIBP always on = false
IBRS preferred over software solution = false
IBRS provides same mode protection = false
EFER[LMSLE] not supported = false
INVLPGB supports TLB flush guest nested = false
ppin processor id number supported = false
SSBD: speculative store bypass disable = false
virtualized SSBD = false
SSBD fixed in hardware = false
CPPC: collaborative processor perf ctrl = false
PSFD: predictive store forward disable = false
not vulnerable to branch type confusion = false
branch sampling feature support = false
(vuln to branch type confusion synth) = true
Size Identifiers (0x80000008/ecx):
number of CPU cores = 0x1 (1)
ApicIdCoreIdSize = 0x0 (0)
performance time-stamp counter size = 40 bits (0)
Feature Extended Size (0x80000008/edx):
max page count for INVLPGB instruction = 0x0 (0)
RDPRU instruction max input support = 0x0 (0)
SVM Secure Virtual Machine (0x8000000a/eax):
SvmRev: SVM revision = 0x0 (0)
SVM Secure Virtual Machine (0x8000000a/edx):
nested paging = false
LBR virtualization = false
SVM lock = false
NRIP save = false
MSR based TSC rate control = false
VMCB clean bits support = false
flush by ASID = false
decode assists = false
SSSE3/SSE5 opcode set disable = false
pause intercept filter = false
pause filter threshold = false
AVIC: AMD virtual interrupt controller = false
virtualized VMLOAD/VMSAVE = false
virtualized global interrupt flag (GIF) = false
GMET: guest mode execute trap = false
X2AVIC: virtualized X2APIC = false
supervisor shadow stack = false
guest Spec_ctl support = false
ROGPT: read-only guest page table = false
host MCE override = false
INVLPGB/TLBSYNC hyperv interc enable = false
VNMI: NMI virtualization = false
IBS virtualization = false
guest SVME addr check = false
NASID: number of address space identifiers = 0x0 (0):
(multi-processing synth) = none
(multi-processing method) = Intel leaf 0xb
(APIC widths synth): CORE_width=0 SMT_width=0
(APIC synth): PKG_ID=1 CORE_ID=0 SMT_ID=0
(uarch synth) = Intel {Netburst}
(synth) = Intel Pentium 4 / Pentium D / Xeon / Xeon MP / Celeron / Celeron D (unknown model) {Netburst}
KVM Whonix-Workstation 17 /proc/cpuinfo with cpu model qemu64
[edit]https://forums.whonix.org/t/potential-improvements-for-virtual-machine-cloaking/21915/9
processor : 0 vendor_id : GenuineIntel cpu family : 15 model : 107 model name : QEMU Virtual CPU version 2.5+ stepping : 1 microcode : 0x1 cpu MHz : 2688.042 cache size : 16384 KB physical id : 0 siblings : 1 core id : 0 cpu cores : 1 apicid : 0 initial apicid : 0 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx lm constant_tsc nopl xtopology cpuid pni cx16 x2apic hypervisor lahf_lm cpuid_fault pti ssbd ibrs ibpb md_clear bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds swapgs itlb_multihit mmio_unknown bhi ibpb_no_ret bogomips : 5376.08 clflush size : 64 cache_alignment : 128 address sizes : 40 bits physical, 48 bits virtual power management: processor : 1 vendor_id : GenuineIntel cpu family : 15 model : 107 model name : QEMU Virtual CPU version 2.5+ stepping : 1 microcode : 0x1 cpu MHz : 2688.042 cache size : 16384 KB physical id : 1 siblings : 1 core id : 0 cpu cores : 1 apicid : 1 initial apicid : 1 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx lm constant_tsc nopl xtopology cpuid pni cx16 x2apic hypervisor lahf_lm cpuid_fault pti ssbd ibrs ibpb md_clear bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds swapgs itlb_multihit mmio_unknown bhi ibpb_no_ret bogomips : 21471.23 clflush size : 64 cache_alignment : 128 address sizes : 40 bits physical, 48 bits virtual power management:
from Whonix 12 WS - qubes Q3 "cat /proc/cpuinfo" (**different PC**)
[edit]processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 1 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 2 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 3 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 4 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 5 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 6 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management: > processor : 7 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz stepping : 3 microcode : 0x17 cpu MHz : 2494.312 cache size : 6144 KB physical id : 0 siblings : 8 core id : 2 cpu cores : 1 apicid : 4 initial apicid : 4 fpu : yes fpu_exception : yes cpuid level : 13 wp : yes flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt bugs : bogomips : 4988.62 clflush size : 64 cache_alignment : 64 address sizes : 39 bits physical, 48 bits virtual power management:
KVM vs Qubes
[edit]KVM
[edit]processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 6 model name : QEMU Virtual CPU version 2.1.2 flags : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pse36 clflush mmx fxsr sse sse2 syscall nx lm pni cx16 x2apic popcnt hypervisor lahf_lm
Qubes
[edit]processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 60 model name : Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz flags : fpu de tsc msr pae cx8 apic sep cmov pat clflush mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl eagerfpu pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm ida arat epb pln pts dtherm fsgsbase bmi1 avx2 bmi2 erms xsaveopt
get-edid output
[edit]EDID
[edit]Install package(s) read-edid following these instructions
1 Platform specific notice.
- Non-Qubes-Whonix: No special notice.
- Qubes-Whonix: In Template.
2 Update the package lists and upgrade the system.
sudo apt update && sudo apt full-upgrade
3 Install the read-edid package(s).
Using apt command line --no-install-recommends option is in most cases optional.
sudo apt install --no-install-recommends read-edid
4 Platform specific notice.
- Non-Qubes-Whonix: No special notice.
- Qubes-Whonix: Shut down Template and restart App Qubes based on it as per Qubes Template Modification.
5 Done.
The procedure of installing package(s) read-edid is complete.
sudo get-edid ; echo $?
Qubes
[edit]This is read-edid version 3.0.1. Prepare for some fun.
Attempting to use i2c interface
Looks like no busses have an EDID. Sorry!
Attempting to use the classical VBE interface
Performing real mode VBE call
Interrupt 0x10 ax=0x4f00 bx=0x0 cx=0x0
Function unsupported
Call failed
VBE version 0
VBE string at 0x0 "O"
VBE/DDC service about to be called
Report DDC capabilities
Performing real mode VBE call
Interrupt 0x10 ax=0x4f15 bx=0x0 cx=0x0
Function unsupported
Call failed
Reading next EDID block
VBE/DDC service about to be called
Read EDID
Performing real mode VBE call
Interrupt 0x10 ax=0x4f15 bx=0x1 cx=0x0
Function unsupported
Call failed
The EDID data should not be trusted as the VBE call failed
Error: output block unchanged
I'm sorry nothing was successful. Maybe try some other arguments
if you played with them, or send an email to Matthew Kern <pyrophobicman@gmail.com>.
1
VirtualBox
[edit]get-edid: get-edid version 2.0.0
Performing real mode VBE call
Interrupt 0x10 ax=0x4f00 bx=0x0 cx=0x0
Function supported
Call successful
VBE version 200
VBE string at 0xc7f10 "VirtualBox VBE BIOS https://www.virtualbox.org/"
VBE/DDC service about to be called
Report DDC capabilities
Performing real mode VBE call
Interrupt 0x10 ax=0x4f15 bx=0x0 cx=0x0
Function unsupported
Call failed
Reading next EDID block
VBE/DDC service about to be called
Read EDID
Performing real mode VBE call
Interrupt 0x10 ax=0x4f15 bx=0x1 cx=0x0
Function unsupported
Call failed
The EDID data should not be trusted as the VBE call failed
Error: output block unchanged
1
KVM
[edit]get-edid: get-edid version 2.0.0
Performing real mode VBE call
Interrupt 0x10 ax=0x4f00 bx=0x0 cx=0x0
halt_sys: file ��y�*+, line -1216758308
Function unsupported
Call successful
VBE version 300
VBE string at 0xc4f55 "SeaBIOS VBE(C) 2011"
VBE/DDC service about to be called
Report DDC capabilities
Performing real mode VBE call
Interrupt 0x10 ax=0x4f15 bx=0x0 cx=0x0
halt_sys: file ��y�*+, line -1216720908
Function unsupported
Call successful
Reading next EDID block
VBE/DDC service about to be called
Read EDID
Performing real mode VBE call
Interrupt 0x10 ax=0x4f15 bx=0x1 cx=0x0
halt_sys: file ��y�*+, line -1216720908
Function unsupported
Call successful
The EDID data should not be trusted as the VBE call failed
Error: output block unchanged
1
Testing
[edit]For users and researchers that wish to reproduce, verify the output of the analysis tools used on this page, could install the following packages.
Install package(s) x11-utils lshw usbutils hddtemp lm-sensors acpi mesa-utils following these instructions
1 Platform specific notice.
- Non-Qubes-Whonix: No special notice.
- Qubes-Whonix: In Template.
2 Update the package lists and upgrade the system.
sudo apt update && sudo apt full-upgrade
3 Install the x11-utils lshw usbutils hddtemp lm-sensors acpi mesa-utils package(s).
Using apt command line --no-install-recommends option is in most cases optional.
sudo apt install --no-install-recommends x11-utils lshw usbutils hddtemp lm-sensors acpi mesa-utils
4 Platform specific notice.
- Non-Qubes-Whonix: No special notice.
- Qubes-Whonix: Shut down Template and restart App Qubes based on it as per Qubes Template Modification.
5 Done.
The procedure of installing package(s) x11-utils lshw usbutils hddtemp lm-sensors acpi mesa-utils is complete.
See Also
[edit]Footnotes
[edit]- ↑ 1.0 1.1 This does not cover application vulnerabilities and exploits, which escalate from the virtual machine to the host. See: Attacks. However, by design the Whonix-Workstation™ does not know its own external non-Tor IP address.
- ↑
/etc/resolv.confin Whonix-Workstation is configured to use the Whonix-Gateway™ as the DNS resolver, which is routed through Tor. - ↑
Adhering to recommendations as per the torbirdy github repository, which prevents leakage of the operating system version (no-emit-version) and other variables (on github).
- ↑ In this case it may appear that the syntax was simply copied from the manpage.
- ↑
The Tails OS similarly sets the username to
amnesia, which is a default value not set by the user and therefore safe. - ↑ To check the color depth run the following command in console. xdpyinfo
- ↑
Do not rely on https://ip-check.info or similar websites to check the desktop resolution and color depth, because Tor Button changes these values to improve anonymity; refer to the TorButton specification and Tor trac for further details. See also Browser Tests.
In order to check the list of installed fonts, run.
fc-list
- ↑
https://github.com/Kicksecure/vm-config-dist/blob/master/etc/skel/.config/xfce4/xfconf/xfce-perchannel-xml/displays.xml
- ↑ To check the desktop resolution and refresh rate, run the following command in console. xrandr
- ↑ So long as the user or any additional software packages do not install further packages.
- ↑ Only three common fonts (monospace, serif, times new roman) can be detected for all Tor Browser users.
- ↑ Robert Ransom previously suggested Whonix should share the same list of fonts as Tails if possible. Since Tor Browser no longer leaks which fonts are installed, lead Whonix developer Patrick Schleizer does not see any advantage of this action (follow-up enquiry ignored).
- ↑ To check the hostname, run. host
- ↑ To check the internal (virtual LAN) IP address, run. sudo ifconfig
- ↑ To check the long host name, run. hostname --fqdn
- ↑ To check the time zone, run. cat /etc/timezone
- ↑ By default, all Whonix users have the same set of software packages installed. However, if additional software packages are installed, this advantage is lost. See also: Software updaters.
- ↑
These were hidden by VirtualBox "Synthetic CPU" in the past but that feature was removed from VirtualBox. (Even then the clock speed of your host CPU was visible to all code (applications or malware) inside Whonix-Workstation.) The parameters
--cpuid-portability-levelor--cpuidremoveallhave been tested and do not hide CPU model and capabilities either.
- ↑
https://forums.whonix.org/t/help-welcome-kvm-development-staying-the-course/166/403
- ↑
https://phabricator.whonix.org/T449
- ↑
This is due to the design of virtualization platforms (VirtualBox, KVM, Xen, Qubes, VMware, etc.). Most virtualization platforms leak CPU model, capabilities and clock speed. Check.
cat /proc/cpuinfo
A workaround in theory could be to use an emulator instead of a virtualizer such as QEMU or bochs. In practice however, unfortunately such emulators are slow and there might be other limitations. (Does Bochs support internal networking?)
- ↑ Hardware serial numbers which any applications could collect are hidden due to the Virtual Machine.
- ↑ It is possible to check the visible hardware yourself with the following commands. sudo lshw and sudo lspci If USB devices are attached, run. sudo lsusb Then compare the results with your host.
- ↑
sudo lshw -C display
*-display description: VGA compatible controller product: SVGA II Adapter vendor: VMware physical id: 2 bus info: pci@0000:00:02.0 version: 00 width: 32 bits clock: 33MHz capabilities: vga_controller bus_master rom configuration: driver=vmwgfx latency=64 resources: irq:18 ioport:d000(size=16) memory:e0000000-e7ffffff memory:f0000000-f01fffff memory:c0000-dffff - ↑ sudo lshw -C display Expected output: No output, which is good.
- ↑ CPU temperature, HDD temperature, S.M.A.R.T.
- ↑ Fortunately virtualizers hide them from the guest VM by not implementing them.
- ↑ To check the sensor information, run.
Using
hddtemp.- Qubes: sudo hddtemp /dev/xvda
- VirtualBox: sudo hddtemp /dev/sda
- KVM: sudo hddtemp /dev/vda
sensors-detect. sudo sensors-detect - ↑ To check the battery information, run. acpi -V
- ↑ 30.0 30.1 To check the BIOS DMI information, run. sudo dmidecode
- ↑ To see disk ids that are in use, run. sudo ls -la /dev/disk/by-id/ sudo ls -la /dev/disk/by-uuid/ Then compare the result with the host.
- ↑ As in explained in VBoxManage modifyhd, this value has no relation to the host by default.
- ↑ To check the VM UUID, run. sudo dmidecode
- ↑ To check the SILC table, run. sudo cat /sys/firmware/acpi/tables/SLIC Inside the virtualizer and on the host. On the host there may or may not be not be a SLIC table. If there is none, it cannot leak into your virtualizer. If there is one, the value will not be mirrored in VirtualBox, which is fine.
- ↑ To check the HDD UUID, run.
- Qubes: sudo hdparm -i /dev/xvda
- VirtualBox: sudo hdparm -i /dev/sda
- KVM: sudo hdparm -i /dev/vda
- ↑ To check the CD-ROM UUID, run. udisks --show-info /dev/cdrom
- ↑ Real hardware UUIDs are hidden by the virtualizer.
- ↑ Virtualizers routinely hide extended display identification data.
- ↑ See: Qubes EDID.
- ↑ See: VirtualBox EDID.
- ↑
- ↑ See: KVM EDID.
- ↑ To check Whonix-Workstation's MAC address, run. sudo ifconfig Inside Whonix-Workstation and then compare it with the host.
- ↑
Disadvantages if a shared MAC Addresses would be used by all Whonix-Workstation:
- Multiple Whonix-Workstation cannot use the Internet at the same time if they are using the same MAC address. It leads to confusing connection interruptions in either of the virtual machines.
- The project contributors need to explain and defend the design, which takes a lot of time for little gain. (Again, it is important not to expose the host's real MAC address, but so long as the one inside the virtual machine is different, everything is in an acceptable state.)
- It may be easier to develop ARP spoofing defense to implement authenticated connections between Whonix-Gateway and Whonix-Workstation. (This is only useful when using Multiple Whonix-Workstation.) To understand the context, please read Connections between Gateway and Workstation.
- In some cases, applications gather the MAC address and send it to a remote server (proprietary license checks use the MAC for hardware fingerprinting). In this case a shared MAC address might be better for privacy. It however might also break the proprietary license check as this expects different MAC addresses for different customers of the proprietary software. See also VM Fingerprinting.
- There might be an advantages of sharing MAC addresses among all Whonix versions. That would be useful in the event an application leaks the MAC address or if Whonix-Workstation was compromised. On the other hand, this would identify the user as a Whonix user.
- ↑
https://github.com/Whonix/dist-base-files
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